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From Innovate Llc
CEE440 Digital Integrated Circuits Design
...pics covered include: the MOS transistor models including Deep Sub-Micron effects; circuit design styles for logic, arithmetic and sequential blocks; estimation and minimization of energy consumption; interconnect models; device sizing and logical effort; clock skew and jitter; active clock distribution techniques; memory architectures; digital system design; testing of integrated circuits.
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...pics covered include: the MOS transistor models including Deep Sub-Micron effects; circuit design styles for logic, arithmetic and sequential blocks; estimation and minimization of energy consumption; interconnect models; device sizing and logical effort; clock skew and jitter; active clock distribution techniques; memory architectures; digital system design; testing of integrated circuits.
more...
CEE530 Digital Integrated Circuits Design
...pics covered include: the MOS transistor models including Deep Sub-Micron effects; circuit design styles for logic, arithmetic and sequential blocks; estimation and minimization of energy consumption; interconnect models; device sizing and logical effort; clock skew and jitter; active clock distribution techniques; memory architectures; digital system design; testing of integrated circuits.
more...
...pics covered include: the MOS transistor models including Deep Sub-Micron effects; circuit design styles for logic, arithmetic and sequential blocks; estimation and minimization of energy consumption; interconnect models; device sizing and logical effort; clock skew and jitter; active clock distribution techniques; memory architectures; digital system design; testing of integrated circuits.
more...
